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Espressif Systems /ESP32-S3 /DMA /OUT_CONF0_CH1

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Interpret as OUT_CONF0_CH1

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (OUT_RST)OUT_RST 0 (OUT_LOOP_TEST)OUT_LOOP_TEST 0 (OUT_AUTO_WRBACK)OUT_AUTO_WRBACK 0 (OUT_EOF_MODE)OUT_EOF_MODE 0 (OUTDSCR_BURST_EN)OUTDSCR_BURST_EN 0 (OUT_DATA_BURST_EN)OUT_DATA_BURST_EN

Description

Configure 0 register of Tx channel 0

Fields

OUT_RST

This bit is used to reset DMA channel 0 Tx FSM and Tx FIFO pointer.
OUT_LOOP_TEST

reserved
OUT_AUTO_WRBACK

Set this bit to enable automatic outlink-writeback when all the data in tx buffer has been transmitted.
OUT_EOF_MODE

EOF flag generation mode when transmitting data. 1: EOF flag for Tx channel 0 is generated when data need to transmit has been popped from FIFO in DMA
OUTDSCR_BURST_EN

Set this bit to 1 to enable INCR burst transfer for Tx channel 0 reading link descriptor when accessing internal SRAM.
OUT_DATA_BURST_EN

Set this bit to 1 to enable INCR burst transfer for Tx channel 0 transmitting data when accessing internal SRAM.

Links

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Register License

Copyright 2024 Espressif Systems (Shanghai) PTE LTD

Licensed under the Apache License, Version 2.0 (the “License”); you may not use this file except in compliance with the License. You may obtain a copy of the License at

http://www.apache.org/licenses/LICENSE-2.0

Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an “AS IS” BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations under the License.

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data